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@@ -561,6 +561,51 @@ class CablePathTestCase(TestCase):
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"""
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Test a connection which passes through a single front/rear port pair.
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+ 1 2
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+ [Device 1] ----- [Panel 1] ----- [Device 2]
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+ Iface1 FP1 RP1 Iface1
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+
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+ TODO: Panel 1's rear port has multiple front ports. Should this even work?
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+ """
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+ # Create cables (FP first, RP second)
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+ cable1 = Cable(
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+ termination_a=Interface.objects.get(device__name='Device 1', name='Interface 1'),
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+ termination_b=FrontPort.objects.get(device__name='Panel 1', name='Front Port 1')
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+ )
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+ cable1.save()
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+ cable2 = Cable(
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+ termination_b=RearPort.objects.get(device__name='Panel 1', name='Rear Port 1'),
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+ termination_a=Interface.objects.get(device__name='Device 2', name='Interface 1')
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+ )
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+ cable2.save()
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+
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+ # Retrieve endpoints
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+ endpoint_a = Interface.objects.get(device__name='Device 1', name='Interface 1')
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+ endpoint_b = Interface.objects.get(device__name='Device 2', name='Interface 1')
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+
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+ # Validate connections
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+ self.assertEqual(endpoint_a.connected_endpoint, endpoint_b)
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+ self.assertEqual(endpoint_b.connected_endpoint, endpoint_a)
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+ self.assertTrue(endpoint_a.connection_status)
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+ self.assertTrue(endpoint_b.connection_status)
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+
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+ # Delete cable 1
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+ cable1.delete()
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+
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+ # Refresh endpoints
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+ endpoint_a.refresh_from_db()
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+ endpoint_b.refresh_from_db()
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+
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+ # Check that connections have been nullified
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+ self.assertIsNone(endpoint_a.connected_endpoint)
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+ self.assertIsNone(endpoint_b.connected_endpoint)
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+ self.assertIsNone(endpoint_a.connection_status)
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+ self.assertIsNone(endpoint_b.connection_status)
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+
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+ def test_connection_via_one_on_one_port(self):
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+ """
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+ Test a connection which passes through a rear port with exactly one front port.
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+
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1 2
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[Device 1] ----- [Panel 5] ----- [Device 2]
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Iface1 FP1 RP1 Iface1
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@@ -630,7 +675,7 @@ class CablePathTestCase(TestCase):
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self.assertIsNone(endpoint_a.connection_status)
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self.assertIsNone(endpoint_b.connection_status)
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- def test_connection_via_nested_single_rear_port(self):
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+ def test_connection_via_nested_one_on_one_port(self):
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"""
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Test a connection which passes through a single front/rear port pair between two multi-port MUXes.
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